1. Field of the Invention
The present invention relates to communication networks having multiple nodes which arbitrate for bus access. More specifically, the present invention relates to interconnecting a plurality of nodes with point-to-point links, and includes the port control logic within each port that controls signal flow during arbitration and data transfer.
2. Description of Related Art
Every communication system having many devices (nodes) that compete for a limited resource (a communication bus) must first arbitrate to determine which one node will next use the bus. After the winning node is determined, the communication system must allow that winning node to use the bus without interference from the other nodes. Thus, a bus architecture for a communication system must be designed to facilitate both arbitration and data transfer.
One common bus architecture includes a single physical bus, for example a cable, that is directly connected to each node. Any node coupled to the single cable can transmit a signal which is received by other nodes. Therefore, the single cable is designed for communication between any of the nodes. The single bus architecture is particularly useful for arbitration because any node must be able to place a signal on the bus during arbitration and all other nodes must receive that signal. Arbitration methods for a single bus are well known, and may include any method such as collision detection, collision avoidance, and token passing.
One possible implementation of single-bus arbitration uses a bus that has a dominant logic. As an example, a two-state dominant "high" bus is constructed such that if at least one node drives the bus to a "high" state then all the nodes detect a "high" state on the bus. All the nodes detect a "low" state on the bus if and only if all the nodes drive the bus to the "low" state.
During arbitration, those nodes requesting bus access drive the dominant logic bus with a distinct sequence of "high" and "low" values. As long as this sequence is distinct for all nodes involved in the arbitration process one and only one node will win.
After the sequence is finished, one and only one node has won, and therefore the bus arbitration phase is complete and the data transfer phase starts. The winning device becomes a bus driver for transmitting data while the rest of the devices connected to the bus become bus receivers for receiving data. Because only one node is transmitting, a bidirectional bus is not required during the data transfer phase. In the single bus example, transmitted data propagates unidirectionally from the winning node to each of the receiving nodes.
Thus, a single physical bus has a number of disadvantages which become very apparent at greater lengths and higher rates of communication. This disadvantage is particularly troublesome during the data transfer phase. In general, length and design can greatly affect the bandwidth of a bus, thereby limiting the maximum speed at which data can be transferred.
One particular problem with a single physical bus is the number of taps made into the cable to connect the devices. Each tap introduces an impedance discontinuity, causing reflections and losses which adversely affect electrical performance. The more taps, the more performance is degraded. Impedance discontinuities can be avoided by the use of splitters; however splitters are expensive, and they cause one-half of the power to be diverted in each of two directions. Therefore even a few splitters will greatly reduce power and substantially degrade performance.
If a single physical bus is implemented in a silicon chip, interconnection technologies currently available can greatly reduce the problem with impedance discontinuities. However, for devices that may be distributed over many meters, a single silicon bus is simply not feasible.
It would be an advantage to provide a communication network that could connect a plurality of short physical buses into a single logical bus for high speed data transfer. It would be a further advantage if the nodes of the communication system have a plurality of ports that can be connected by point-to-point links, thereby providing a significant speed advantage compared with traditional multi-access buses. It would be an advantage if the nodes have a bus architecture that automatically provides a first bus configuration for arbitration in which the bus can be treated as a single logical bus, and following arbitration, the bus interconnects are oriented in the correct direction so that all receiving nodes can receive the data packet generated by the transmitting node. This second bus configuration would provide for high speed unidirectional data transfer without the bandwidth limitations of a single bus.
One problem with creating a connection between two dominant logic buses is the possibility of "a latch-up" that could occur if the both bus transmitters transmit at the same time. In that instance, the dominant state perpetuates itself with positive feedback which renders the entire system non-operational or "latched up". If each node is controlled only by itself without central control, each node will not know that the other node is latched up, and therefore this latched up condition is difficult to detect and prevent. It would be an advantage to provide an interconnect system that avoids the latch-up problem without central control.